Senior Engineer Mixed Signal Layout (f/m/div) - LV-375656421

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for jobs that impact everyone's life.

What
if your ideas could change the way the world connects, powers up, or thinks? As
a Senior Engineer Mixed Signal Layout in our Research & Development team,
you'll have the opportunity to merge creativity with your technical expertise
by shaping the future of technology, driving groundbreaking projects, and
bringing new ideas to life.

Are
you in? Your roleKey responsibilities in your new roleFull
Custom Layout: Execute
full-custom IC and block-level layout from schematic to tape-out for ADC
mixed-signal componentsLayout
Optimization: Implement
precise matching techniques and isolation strategies to prevent noise coupling
in sensitive analog front-endsPhysical
Verification: Run
and debug full-chip physical verifications, including DRC, LVS, ERC, and
antenna rule checks Parasitic
Management: Analyze
and minimize parasitic resistance, capacitance, and inductance to ensure signal
and power integrityTop-Level
Integration: Perform
floor planning, pad-ring assembly, and final chip integration, considering ESD,
latch-up, and electromigration (EM) guidelinesLeadership
& Mentorship: Provide
technical leadership during project execution and mentor junior layout
engineers within the teamYour profileQualifications and skills to help you succeed A bachelor's or master's degree in electrical engineering or a comparable fieldIdeally
5+ years of hands-on experience in CMOS and FinFET semiconductor technologies High proficiency with industry-standard EDA tools (Cadence Virtuoso, Siemens Calibre, etc.